hi-sincerity microelectronics corp. spec. no. : mos200809 issued date : 2008.11.18 revised date :2010.04.14 page no. : 1/4 H2N7002KSN hsmc product specification H2N7002KSN H2N7002KSN pin assignment & symbol n-channel transistor description n-channel enhancement-mode mos transistor. esd protected absolute maximum ratings drain-source voltage ........................................................................................................... ................................. 60 v drain-gate voltage (r gs =1m )............................................................................................................................. 60 v gate-sourc e volt age ............................................................................................................ ............................... 20 v continuous drain current (t a =25 c) (1) ............................................................................................................. 200 ma continuous drain current (t a =100 c) (1) ........................................................................................................... 115 ma pulsed drain current (t a =25 c) (2) .................................................................................................................... 800 ma storage tem perature............................................................................................................ ................... -55 to 150 c operating juncti on temperature ................................................................................................. ............ -55 to 150 c lead temperature, for 10 second so ldering ...................................................................................... ................ 260 c gate source esd rating????????????????????????????????????.? 2kv electrical characteristics (t a =25 c) parameter symbol test conditions min typ. max unit drain-source breakdown voltage bv dss v gs =0, i d =10ua 60 - - v gate threshold voltage v gs(th) v ds = v gs , i d =0.25ma 1 - 2.0 v gate source leakage current, forward i gss/f v gs =+20v, v ds =0 - - 10 ua gate source leakage current, reverse i gss/r v gs =-20v, v ds =0 - - -10 ua zero gate voltage drain current i dss v ds =48v, v gs =0 - - 10 ua on-state drain current i d(on) v ds >2v ds(on) , v gs =10v 500 - - ma i d =50ma, v gs =5v - - 0.375 v static drain-source on-state voltage v ds(on) i d =500ma, v gs =10v - - 3.75 v i d =75ma, v gs =4.5v 5.3 i d =50ma, v gs =5v - - 5.0 static drain-source on-state resistance r ds(on) i d =500ma, v gs =10v - - 5.0 forward transconductance g fs v ds >2v ds(on) , i d =200ma 80 - - ms turn-on delay time t d(on) - 20 - ns turn-off delay time t d(off) (v dd =50v, r d =250 , v gs =10v, r g =50 ) - 40 - ns input capacitance c iss - 50 pf output capacitance c oss - 25 pf reverse transfer capacitance c rss v ds =25v, v gs =0, f=1mhz - 5 pf (1)the power dissipation of the package may result in a continuous drain current. (2)pulse width 300us, duty cycle 2%. 3-lead plastic sot-323 package code: sn pin 1: gate 2: source 3: drain 1 2 3
hi-sincerity microelectronics corp. spec. no. : mos200809 issued date : 2008.11.18 revised date :2010.04.14 page no. : 2/4 H2N7002KSN hsmc product specification characteristics curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 012345 vds-drain-to-source voltage(v) output characteristics id-drain curren 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 01234 vgs- gate-to-source voltage(v) transfer characteristics id-drain curren t tj=25 tj=75 tj=125 vgs=10v vgs=3v vgs=4v vgs=5v vgs=6v vgs=7v t 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 25 50 75 100 125 150 vgs(th) varia 0 0.5 1 1.5 2 2.5 3 3.5 4 25 50 75 100 125 150 tj-junction temperature( ) on- resistance vs.junction temperature rds(on)-on- resistance(normaliz vgs=4.5v at 200m n a id=250ua tj-junction temperature( ) threshold voltage variance over temperature vgs=10v at 500ma safe operating area 0.1 1 10 1 10 100 1000 forward biased voltage-v ce (v) collector current-i c (ma) pt=100ms pt=10ms pt=1ms 0 0.5 1 1.5 2 2.5 3 0246810 rds(on)-on-resistanc e id=200ma id=500ma vgs-gate-to-source voltage(v) on- resistance vs.gate-source voltage
hi-sincerity microelectronics corp. spec. no. : mos200809 issued date : 2008.11.18 revised date :2010.04.14 page no. : 3/4 H2N7002KSN hsmc product specification sot-323 (sc-70) dimension k 12 3 s l a d g c h b n j dim min. max. a 1.80 2.20 b 1.15 1.35 c 0.80 1.00 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of hsmc. ? hsmc reserves the right to make changes to its products without notice. ? hsmc semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? hsmc assumes no liability for any consequence of customer prod uct design, infringement of paten ts, or application assistance. head office ? head office (hi-sincerity microelectronics corp.): 5/f., golden harvest building 15 wang chiu road, kowloon bay, hong kong tel: +852-2755-7162 fax: +852-2755- 7795 avantics : shanghai address: no.399, cai lum rd. zhang jiang technology industrial park pudong, shanghai 201210, china tel: +86(21) 61637118 fax: +86(21)61637006 d 0.30 0.40 g 1.20 1.40 h 0.00 0.10 j 0.10 0.25 k 0.425 (ref) l 0.65 (bsc) n 0.70 (ref) s 2.00 2.40 unit: mm marking: note: pb-free product can distinguish by the green label or the extra description on the right side of the label. pin style: 1.gate 2.source 3.drain material: ? lead solder plating: sn60/pb40 (normal), sn/3.0ag/0.5cu or pure-tin (pb-free) ? mold compound: epoxy resin family, flammabilit y solid burnin g class: ul94v-0 3-lead sot-323 plastic surface mounted package hsmc package code: sn
hi-sincerity microelectronics corp. spec. no. : mos200809 issued date : 2008.11.18 revised date :2010.04.14 page no. : 4/4 H2N7002KSN hsmc product specification soldering methods for hsmc?s products 1. storage environment: temperature=10 o c~35 o c humidity=65%15% 2. reflow soldering of surface-mount devices figure 1: temperature profile t p profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (t l to t p ) <3 o c/sec <3 o c/sec preheat - temperature min (ts min ) - temperature max (ts max ) - time (min to max) (ts) 100 o c 150 o c 60~120 sec 150 o c 200 o c 60~180 sec ts m a x t o t l - ramp-up rate <3 o c/sec <3 o c/sec time maintained above: - temperature (t l ) - time (t l ) 183 o c 60~150 sec 217 o c 60~150 sec peak temperature (t p ) 240 o c +0/-5 o c 260 o c +0/-5 o c time within 5 o c of actual peak temperature (t p ) 10~30 sec 20~40 sec ramp-down rate <6 o c/sec <6 o c/sec time 25 o c to peak temperature <6 minutes <8 minutes 3. flow (wave) soldering (solder dipping) products peak temperature dipping time pb devices. 245 o c 5 o c 5sec 1sec pb-free devices. 260 o c +0/-5 o c 5sec 1sec t l ramp-down ramp-up ts max ts min critical zone t l to t p t s preheat t l t p 25 temperature t 25 o c to peak time
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